Designing efficient input interconnect blocks for LUT clusters using counting and entropy.

Wenyi Feng Sinan Kaptanoglu Designing efficient input interconnect blocks for LUT clusters using counting and entropy. 23-32 2007 conf/fpga/2007 FPGA http://doi.acm.org/10.1145/1216919.1216923 db/conf/fpga/fpga2007.html#FengK07