Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs.

Alessandro Cevrero Panagiotis Athanasopoulos Hadi Parandeh-Afshar Ajay K. Verma Philip Brisk Frank K. Gürkaynak Yusuf Leblebici Paolo Ienne Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. 181-190 2008 FPGA http://doi.acm.org/10.1145/1344671.1344699 conf/fpga/2008 db/conf/fpga/fpga2008.html#CevreroAPVBGLI08