<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fpga/BanerjeeSUHNKBPTA03" mdate="2006-05-17">
<author>Prithviraj Banerjee</author>
<author>Vikram Saxena</author>
<author>J. R. Uribe</author>
<author>Malay Haldar</author>
<author>Anshuman Nayak</author>
<author>Victor Kim</author>
<author>Debabrata Bagchi</author>
<author>Satrajit Pal</author>
<author>Nikhil Tripathi</author>
<author>R. Anderson</author>
<title>Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs.</title>
<pages>237</pages>
<year>2003</year>
<booktitle>FPGA</booktitle>
<ee>http://doi.acm.org/10.1145/611817.611854</ee>
<url>db/conf/fpga/fpga2003.html#BanerjeeSUHNKBPTA03</url>
</inproceedings>
</dblp>
