Bit-Level Abstraction in the Verfication of Pipelined Microprocessors by Correspondence Checking.

Miroslav N. Velev Randal E. Bryant Bit-Level Abstraction in the Verfication of Pipelined Microprocessors by Correspondence Checking. 18-35 http://link.springer.de/link/service/series/0558/bibs/1522/15220018.htm 1998 conf/fmcad/1998 FMCAD db/conf/fmcad/fmcad1998.html#VelevB98