<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fmcad/Russinoff00" mdate="2002-06-19">
<author>David M. Russinoff</author>
<title>A Case Study in Fomal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon<sup>TM</sup> Processor.</title>
<pages>3-36</pages>
<ee>http://link.springer.de/link/service/series/0558/bibs/1954/19540003.htm</ee>
<year>2000</year>
<crossref>conf/fmcad/2000</crossref>
<booktitle>FMCAD</booktitle>
<url>db/conf/fmcad/fmcad2000.html#Russinoff00</url>
</inproceedings>
</dblp>
