<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fm/LaurentMW01" mdate="2002-01-03">
<author>Odile Laurent</author>
<author>Pierre Michel</author>
<author>Virginie Wiels</author>
<title>Using Formal Verification Techniques to Reduce Simulation and Test Effort.</title>
<pages>465-477</pages>
<year>2001</year>
<crossref>conf/fm/2001</crossref>
<booktitle>FME</booktitle>
<ee>http://link.springer.de/link/service/series/0558/bibs/2021/20210465.htm</ee>
<url>db/conf/fm/fme2001.html#LaurentMW01</url>
</inproceedings>
</dblp>
