BibTeX record conf/essderc/ZengDLMPSLJYCCH23

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@inproceedings{DBLP:conf/essderc/ZengDLMPSLJYCCH23,
  author       = {Yiqin Zeng and
                  Zhetao Ding and
                  Xueyang Li and
                  Minglei Ma and
                  Yue Peng and
                  Rongzong Shen and
                  Gaobo Lin and
                  Chengji Jin and
                  Xiao Yu and
                  Bing Chen and
                  Ran Cheng and
                  Genquan Han},
  title        = {Complete Reconfigurable Boolean Logic Gates Based on One FeFET -One
                  {RRAM} Technology},
  booktitle    = {53rd {IEEE} European Solid-State Device Research Conference, {ESSDERC}
                  2023, Lisbon, Portugal, September 11-14, 2023},
  pages        = {85--88},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ESSDERC59256.2023.10268548},
  doi          = {10.1109/ESSDERC59256.2023.10268548},
  timestamp    = {Mon, 09 Oct 2023 15:43:28 +0200},
  biburl       = {https://dblp.org/rec/conf/essderc/ZengDLMPSLJYCCH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}