BibTeX record conf/essderc/TanakaIS15

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@inproceedings{DBLP:conf/essderc/TanakaIS15,
  author       = {Chika Tanaka and
                  Keiji Ikeda and
                  Masumi Saitoh},
  title        = {New layout design methodology for monolithically integrated 3D {CMOS}
                  logic circuits based on parasitics engineering},
  booktitle    = {45th European Solid State Device Research Conference, {ESSDERC} 2015,
                  Graz, Austria, September 14-18, 2015},
  pages        = {258--261},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ESSDERC.2015.7324763},
  doi          = {10.1109/ESSDERC.2015.7324763},
  timestamp    = {Sun, 25 Oct 2020 22:47:56 +0100},
  biburl       = {https://dblp.org/rec/conf/essderc/TanakaIS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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