BibTeX record conf/esscirc/LimLLYC18

• > Home > conf/esscirc/LimLLYC18

@inproceedings{DBLP:conf/esscirc/LimLLYC18,
  author       = {Younghyun Lim and
                  Jeonghyun Lee and
                  Yongsun Lee and
                  Seyeon Yoo and
                  Jaehyouk Choi},
  title        = {A 320{\(\mathrm{\mu}\)}V-Output Ripple and 90ns-Settling Time at 0.5V
                  Supply Digital-Analog-Hybrid {LDO} Using Multi-Level Gate-Voltage
                  Generator and Fast-Decision {PD} Detector},
  booktitle    = {44th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2018,
                  Dresden, Germany, September 3-6, 2018},
  pages        = {210--213},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ESSCIRC.2018.8494243},
  doi          = {10.1109/ESSCIRC.2018.8494243},
  timestamp    = {Sat, 09 Apr 2022 12:39:17 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/LimLLYC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}