BibTeX record conf/esscirc/LiRJY22

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@inproceedings{DBLP:conf/esscirc/LiRJY22,
  author       = {Wantong Li and
                  James Read and
                  Hongwu Jiang and
                  Shimeng Yu},
  title        = {A 40nm {RRAM} Compute-in-Memory Macro with Parallelism-Preserving
                  {ECC} for Iso-Accuracy Voltage Scaling},
  booktitle    = {48th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2022,
                  Milan, Italy, September 19-22, 2022},
  pages        = {101--104},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ESSCIRC55480.2022.9911464},
  doi          = {10.1109/ESSCIRC55480.2022.9911464},
  timestamp    = {Tue, 21 Mar 2023 20:59:00 +0100},
  biburl       = {https://dblp.org/rec/conf/esscirc/LiRJY22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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