BibTeX record conf/esscirc/JeongYLK04

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@inproceedings{DBLP:conf/esscirc/JeongYLK04,
  author       = {Chun{-}Seok Jeong and
                  Changsik Yoo and
                  Jae{-}Jin Lee and
                  Joongsik Kih},
  editor       = {Michiel Steyaert and
                  C. L. Claeys},
  title        = {Digital delay locked loop with open-loop digital duty cycle corrector
                  for 1.2Gb/s/pin double data rate {SDRAM}},
  booktitle    = {33rd European Solid-State Circuits Conference, {ESSCIRC} 2004, Leuven,
                  Belgium, September 21-23, 2004},
  pages        = {379--382},
  publisher    = {{IEEE}},
  year         = {2004},
  url          = {https://doi.org/10.1109/ESSCIR.2004.1356697},
  doi          = {10.1109/ESSCIR.2004.1356697},
  timestamp    = {Wed, 29 Mar 2023 10:59:49 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/JeongYLK04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}