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BibTeX record conf/esscirc/BouesseRWG05
@inproceedings{DBLP:conf/esscirc/BouesseRWG05, author = {G. Fraidy Bouesse and Marc Renaudin and Adrien Witon and Fabien Germain}, editor = {Laurent Fesquet and Andreas Kaiser and Sorin Cristoloveanu and Michel Brillou{\"{e}}t}, title = {A clock-less low-voltage {AES} crypto-processor}, booktitle = {Proceedings of the 31st European Solid-State Circuits Conference, {ESSCIRC} 2005, Grenoble, France, 12-16 September 2005}, pages = {403--406}, publisher = {{IEEE}}, year = {2005}, url = {https://doi.org/10.1109/ESSCIR.2005.1541645}, doi = {10.1109/ESSCIR.2005.1541645}, timestamp = {Fri, 28 Apr 2023 15:39:25 +0200}, biburl = {https://dblp.org/rec/conf/esscirc/BouesseRWG05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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