Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs.

Jingzhao Ou Viktor K. Prasanna Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs. 55-61 2005 conf/ersa/2005 ERSA db/conf/ersa/ersa2005.html#OuP05