BibTeX record conf/dsd/DehbashiFRR12

download as .bib file

@inproceedings{DBLP:conf/dsd/DehbashiFRR12,
  author       = {Mehdi Dehbashi and
                  G{\"{o}}rschwin Fey and
                  Kaushik Roy and
                  Anand Raghunathan},
  title        = {On Modeling and Evaluation of Logic Circuits under Timing Variations},
  booktitle    = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
                  Izmir, Turkey, September 5-8, 2012},
  pages        = {431--436},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/DSD.2012.91},
  doi          = {10.1109/DSD.2012.91},
  timestamp    = {Thu, 23 Mar 2023 23:59:36 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/DehbashiFRR12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.