BibTeX record conf/dft/WuWYFWJTZLCLJ10

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@inproceedings{DBLP:conf/dft/WuWYFWJTZLCLJ10,
  author       = {Shianling Wu and
                  Laung{-}Terng Wang and
                  Lizhen Yu and
                  Hiroshi Furukawa and
                  Xiaoqing Wen and
                  Wen{-}Ben Jone and
                  Nur A. Touba and
                  FeiFei Zhao and
                  Jinsong Liu and
                  Hao{-}Jan Chao and
                  Fangfang Li and
                  Zhigang Jiang},
  title        = {Logic {BIST} Architecture Using Staggered Launch-on-Shift for Testing
                  Designs Containing Asynchronous Clock Domains},
  booktitle    = {25th {IEEE} International Symposium on Defect and Fault Tolerance
                  in {VLSI} Systems, {DFT} 2010, Kyoto, Japan, October 6-8, 2010},
  pages        = {358--366},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/DFT.2010.50},
  doi          = {10.1109/DFT.2010.50},
  timestamp    = {Fri, 24 Mar 2023 00:02:09 +0100},
  biburl       = {https://dblp.org/rec/conf/dft/WuWYFWJTZLCLJ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}