Concurrent Error Detection for Combinational Logic Blocks Implemented with Embedded Memory Blocks of FPGAs.

Andrzej Krasniewski Concurrent Error Detection for Combinational Logic Blocks Implemented with Embedded Memory Blocks of FPGAs. 74-79 2008 DDECS http://dx.doi.org/10.1109/DDECS.2008.4538760 conf/ddecs/2008 db/conf/ddecs/ddecs2008.html#Krasniewski08