@inproceedings{DBLP:conf/ddecs/JenihhinRUPR07,
author = {Maksim Jenihhin and
Jaan Raik and
Raimund Ubar and
Witold A. Pleskacz and
Michal Rakowski},
title = {Layout to Logic Defect Analysis for Hierarchical Test Generation},
booktitle = {DDECS},
year = {2007},
pages = {35-40},
crossref = {DBLP:conf/ddecs/2007},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/ddecs/2007,
editor = {Patrick Girard and
Andrzej Krasniewski and
Elena Gramatov{\'a} and
Adam Pawlak and
Tomasz Garbolino},
title = {Proceedings of the 10th IEEE Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems (DDECS 2007), Krak{\'o}w,
Poland, April 11-13, 2007},
booktitle = {DDECS},
publisher = {IEEE Computer Society},
year = {2007},
isbn = {1-4244-1161-0},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
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