BibTeX record conf/ddecs/HsiaoCWSC19

download as .bib file

@inproceedings{DBLP:conf/ddecs/HsiaoCWSC19,
  author       = {Hsiang{-}Chih Hsiao and
                  Chun{-}Wei Chen and
                  Jonas Wang and
                  Ming{-}Der Shieh and
                  Pei{-}Yin Chen},
  title        = {Architecture-aware Memory Access Scheduling for High-throughput Cascaded
                  Classifiers},
  booktitle    = {22nd {IEEE} International Symposium on Design and Diagnostics of Electronic
                  Circuits {\&} Systems, {DDECS} 2019, Cluj-Napoca, Romania, April
                  24-26, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/DDECS.2019.8724671},
  doi          = {10.1109/DDECS.2019.8724671},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/ddecs/HsiaoCWSC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.