<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/date/ZhangZYZSPZCMSIC08" mdate="2008-08-05">
<author>Wanping Zhang</author>
<author>Yi Zhu</author>
<author>Wenjian Yu</author>
<author>Ling Zhang</author>
<author>Rui Shi</author>
<author>He Peng</author>
<author>Zhi Zhu</author>
<author>Lew Chua-Eoan</author>
<author>Rajeev Murgai</author>
<author>Toshiyuki Shibuya</author>
<author>Nuriyoki Ito</author>
<author>Chung-Kuan Cheng</author>
<title>Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network.</title>
<pages>537-540</pages>
<year>2008</year>
<booktitle>DATE</booktitle>
<ee>http://dx.doi.org/10.1109/DATE.2008.4484906</ee>
<crossref>conf/date/2008</crossref>
<url>db/conf/date/date2008.html#ZhangZYZSPZCMSIC08</url>
</inproceedings>
</dblp>
