A low-cost concurrent error detection technique for processor control logic.

Ramtilak Vemu Abhijit Jas Jacob A. Abraham Srinivas Patil Rajesh Galivanche A low-cost concurrent error detection technique for processor control logic. 897-902 2008 DATE http://dx.doi.org/10.1109/DATE.2008.4484788 conf/date/2008 db/conf/date/date2008.html#VemuJAPG08