Tarvo Raudvere Ashish Kumar Singh Ingo Sander Axel Jantsch Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits. 690-691 2004 conf/date/2004 DATE http://csdl.computer.org/comp/proceedings/date/2004/2085/01/208510690abs.htm db/conf/date/date2004-1.html#RaudvereSSJ04