RanjanVASVG04'

BibTeX

@inproceedings{DBLP:conf/date/RanjanVASVG04,
  author    = {Mukesh Ranjan and
               Wim Verhaegen and
               Anuradha Agarwal and
               Hemanth Sampath and
               Ranga Vemuri and
               Georges G. E. Gielen},
  title     = {Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled
               Parasitic-Aware Symbolic Performance Models},
  booktitle = {DATE},
  year      = {2004},
  pages     = {604-609},
  ee        = {http://csdl.computer.org/comp/proceedings/date/2004/2085/01/208510604abs.htm},
  crossref  = {DBLP:conf/date/2004},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/date/2004,
  title     = {2004 Design, Automation and Test in Europe Conference and
               Exposition (DATE 2004), 16-20 February 2004, Paris, France},
  booktitle = {DATE},
  publisher = {IEEE Computer Society},
  year      = {2004},
  isbn      = {0-7695-2085-5},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}