BibTeX record conf/date/PozzoniFMPP23

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@inproceedings{DBLP:conf/date/PozzoniFMPP23,
  author       = {Luca Ezio Pozzoni and
                  Fabrizio Ferrandi and
                  Loris Mendola and
                  Alfio Antonino Palazzo and
                  Francesco Pappalardo},
  title        = {Using High-Level Synthesis to model System Verilog procedural timing
                  controls},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/DATE56975.2023.10136907},
  doi          = {10.23919/DATE56975.2023.10136907},
  timestamp    = {Sun, 12 Nov 2023 02:10:57 +0100},
  biburl       = {https://dblp.org/rec/conf/date/PozzoniFMPP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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