BibTeX record conf/date/KallaC99

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@inproceedings{DBLP:conf/date/KallaC99,
  author       = {Priyank Kalla and
                  Maciej J. Ciesielski},
  title        = {Performance Driven Resynthesis by Exploiting Retiming-Induced State
                  Register Equivalence},
  booktitle    = {1999 Design, Automation and Test in Europe {(DATE} '99), 9-12 March
                  1999, Munich, Germany},
  pages        = {638--642},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1999},
  url          = {https://doi.org/10.1109/DATE.1999.761196},
  doi          = {10.1109/DATE.1999.761196},
  timestamp    = {Fri, 24 Mar 2023 00:02:46 +0100},
  biburl       = {https://dblp.org/rec/conf/date/KallaC99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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