A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification.

Kees Goossens John Dielissen Om Prakash Gangwal Santiago González Pestana Andrei Radulescu Edwin Rijpkema A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification. 1182-1187 2005 conf/date/2005 DATE http://doi.ieeecomputersociety.org/10.1109/DATE.2005.11 db/conf/date/date2005.html#GoossensDGPRR05