On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips.

Sandeep Kumar Goel Erik Jan Marinissen On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips. 44-49 2005 conf/date/2005 DATE http://doi.ieeecomputersociety.org/10.1109/DATE.2005.231 db/conf/date/date2005.html#GoelM05