A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement.

Radim Cmar Luc Rijnders Patrick Schaumont Serge Vernalde Ivo Bolsens A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. 271- 1999 conf/date/1999 DATE http://csdl.computer.org/comp/proceedings/date/1999/0078/00/00780271abs.htm db/conf/date/date1999.html#CmarRSVB99