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BibTeX record conf/date/ChenZJHMS21
@inproceedings{DBLP:conf/date/ChenZJHMS21, author = {Yuge Chen and Zhongyuan Zhao and Jianfei Jiang and Guanghui He and Zhigang Mao and Weiguang Sheng}, title = {Reducing Memory Access Conflicts with Loop Transformation and Data Reuse on Coarse-grained Reconfigurable Architecture}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2021, Grenoble, France, February 1-5, 2021}, pages = {124--129}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.23919/DATE51398.2021.9473971}, doi = {10.23919/DATE51398.2021.9473971}, timestamp = {Wed, 20 Jul 2022 10:55:45 +0200}, biburl = {https://dblp.org/rec/conf/date/ChenZJHMS21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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