Extraction of Schematic Array Models for Memory Circuits.

Soumitra Bose Amit Nandi Extraction of Schematic Array Models for Memory Circuits. 570-577 2004 conf/date/2004 DATE http://csdl.computer.org/comp/proceedings/date/2004/2085/01/208510570abs.htm db/conf/date/date2004-1.html#BoseN04