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@inproceedings{DBLP:conf/dac/RaghavanBR92,
author = {Vivek Raghavan and
J. Eric Bracken and
Ronald A. Rohrer},
title = {AWESpice: A General Tool for the Accurate and Efficient
Simulation of Interconnect Problems},
booktitle = {DAC},
year = {1992},
pages = {87-92},
ee = {http://portal.acm.org/citation.cfm?id=113938.110425},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2006-03-14 by Michael Ley (ley@uni-trier.de)