BibTeX record conf/dac/LiuKWC18

• > Home > conf/dac/LiuKWC18

@inproceedings{DBLP:conf/dac/LiuKWC18,
  author       = {Xinheng Liu and
                  Dae Hee Kim and
                  Chang Wu and
                  Deming Chen},
  editor       = {Shiyan Hu},
  title        = {Resource and data optimization for hardware implementation of deep
                  neural networks targeting FPGA-based edge devices},
  booktitle    = {Proceedings of the 20th System Level Interconnect Prediction Workshop,
                  SLIP@DAC 2018, San Francisco, CA, USA, June 23, 2018},
  pages        = {1:1--1:8},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3225209.3225214},
  doi          = {10.1145/3225209.3225214},
  timestamp    = {Wed, 21 Nov 2018 12:44:19 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/LiuKWC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}