BibTeX record conf/dac/LisG89

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@inproceedings{DBLP:conf/dac/LisG89,
  author    = {Joseph Lis and
               Daniel Gajski},
  title     = {{VHDL} Synthesis Using Structured Modeling},
  booktitle = {{DAC}},
  pages     = {606--609},
  year      = {1989},
  url       = {http://doi.acm.org/10.1145/74382.74486},
  doi       = {10.1145/74382.74486},
  timestamp = {Mon, 16 Dec 2002 10:15:17 +0100},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/dac/LisG89},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}