Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm.

Felix Bürgin Flavio Carbognani Martin Hediger Hektor Meier Robert Meyer-Piening Rafael Santschi Hubert Kaeslin Norbert Felber Wolfgang Fichtner Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm. 558-561 2006 conf/dac/2006 DAC http://doi.acm.org/10.1145/1146909.1147054 db/conf/dac/dac2006.html#BurginCHMMSKFF06