BibTeX record conf/coolchips/TamuraKIOUOOKYI14

• > Home > conf/coolchips/TamuraKIOUOOKYI14

@inproceedings{DBLP:conf/coolchips/TamuraKIOUOOKYI14,
  author       = {Hikaru Tamura and
                  Kiyoshi Kato and
                  Takahiko Ishizu and
                  Tatsuya Onuki and
                  Wataru Uesugi and
                  Takuro Ohmaru and
                  Kazuaki Ohshima and
                  Hidetomo Kobayashi and
                  Seiichi Yoneda and
                  Atsuo Isobe and
                  Naoaki Tsutsui and
                  Suguru Hondo and
                  Yasutaka Suzuki and
                  Yutaka Okazaki and
                  Tomoaki Atsumi and
                  Yutaka Shionoiri and
                  Yukio Maehashi and
                  Gensuke Goto and
                  Masahiro Fujita and
                  James Myers and
                  Pekka Korpinen and
                  Jun Koyama and
                  Yoshitaka Yamamoto and
                  Shunpei Yamazaki},
  title        = {Embedded {SRAM} and Cortex-M0 core with backup circuits using a 60-nm
                  crystalline oxide semiconductor for power gating},
  booktitle    = {2014 {IEEE} Symposium on Low-Power and High-Speed Chips, {COOL} Chips
                  XVII, Yokohama, Japan, April 14-16, 2014},
  pages        = {1--3},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/CoolChips.2014.6842955},
  doi          = {10.1109/COOLCHIPS.2014.6842955},
  timestamp    = {Thu, 23 Mar 2023 23:58:22 +0100},
  biburl       = {https://dblp.org/rec/conf/coolchips/TamuraKIOUOOKYI14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}