BibTeX record conf/coolchips/OtaniKNIUAAMHBS11

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@inproceedings{DBLP:conf/coolchips/OtaniKNIUAAMHBS11,
  author       = {Sugako Otani and
                  Hiroyuki Kondo and
                  Itaru Nonomura and
                  Atsuyuki Ikeya and
                  Minoru Uemura and
                  Katsushi Asahina and
                  Kazutami Arimoto and
                  Shin'ichi Miura and
                  Toshihiro Hanawa and
                  Taisuke Boku and
                  Mitsuhisa Sato},
  title        = {An 80 Gbps dependable multicore communication SoC with {PCI} express
                  {I/F} and intelligent interrupt controller},
  booktitle    = {2011 {IEEE} Symposium on Low-Power and High-Speed Chips, Cool Chips
                  XIV, Yokohama, Japan, 20-22 April, 2011},
  pages        = {1--3},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/COOLCHIPS.2011.5890920},
  doi          = {10.1109/COOLCHIPS.2011.5890920},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/coolchips/OtaniKNIUAAMHBS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}