BibTeX record conf/coolchips/ChoiLKY20

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@inproceedings{DBLP:conf/coolchips/ChoiLKY20,
  author       = {Haerang Choi and
                  Yosep Lee and
                  Jae{-}Joon Kim and
                  Sungjoo Yoo},
  title        = {A Novel In-DRAM Accelerator Architecture for Binary Neural Network},
  booktitle    = {2020 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS}
                  2020, Kokubunji, Japan, April 15-17, 2020},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/COOLCHIPS49199.2020.9097642},
  doi          = {10.1109/COOLCHIPS49199.2020.9097642},
  timestamp    = {Sat, 06 Jun 2020 15:03:06 +0200},
  biburl       = {https://dblp.org/rec/conf/coolchips/ChoiLKY20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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