<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/codes/HaqueJP09" mdate="2009-10-25">
<author>Mohammad Shihabul Haque</author>
<author>Andhi Janapsatya</author>
<author>Sri Parameswaran</author>
<title>SuSeSim: a fast simulation strategy to find optimal L1 cache configuration for embedded systems.</title>
<pages>295-304</pages>
<year>2009</year>
<booktitle>CODES+ISSS</booktitle>
<ee>http://doi.acm.org/10.1145/1629435.1629476</ee>
<crossref>conf/codes/2009</crossref>
<url>db/conf/codes/codes2009.html#HaqueJP09</url>
</inproceedings>
</dblp>
