HaqueJP09'

BibTeX

@inproceedings{DBLP:conf/codes/HaqueJP09,
  author    = {Mohammad Shihabul Haque and
               Andhi Janapsatya and
               Sri Parameswaran},
  title     = {SuSeSim: a fast simulation strategy to find optimal L1 cache
               configuration for embedded systems},
  booktitle = {CODES+ISSS},
  year      = {2009},
  pages     = {295-304},
  ee        = {http://doi.acm.org/10.1145/1629435.1629476},
  crossref  = {DBLP:conf/codes/2009},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/codes/2009,
  editor    = {Wolfgang Rosenstiel and
               Kazutoshi Wakabayashi},
  title     = {Proceedings of the 7th International Conference on Hardware/Software
               Codesign and System Synthesis, CODES+ISSS 2009, Grenoble,
               France, October 11-16, 2009},
  booktitle = {CODES+ISSS},
  publisher = {ACM},
  year      = {2009},
  isbn      = {978-1-60558-628-1},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}