BibTeX record conf/cicc/MoriwakiKSSM11

download as .bib file

@inproceedings{DBLP:conf/cicc/MoriwakiKSSM11,
  author       = {Shinichi Moriwaki and
                  Atsushi Kawasumi and
                  Toshikazu Suzuki and
                  Takayasu Sakurai and
                  Shinji Miyano},
  editor       = {Rakesh Patel and
                  Tom Andre and
                  Aurangzeb Khan},
  title        = {0.4V {SRAM} with bit line swing suppression charge share hierarchical
                  bit line scheme},
  booktitle    = {2011 {IEEE} Custom Integrated Circuits Conference, {CICC} 2011, San
                  Jose, CA, USA, Sept. 19-21, 2011},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/CICC.2011.6055398},
  doi          = {10.1109/CICC.2011.6055398},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/MoriwakiKSSM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.