BibTeX record conf/cicc/MishraJLMSA11

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@inproceedings{DBLP:conf/cicc/MishraJLMSA11,
  author       = {Navin K. Mishra and
                  Manish Jain and
                  Phuong Le and
                  Sanku Mukherjee and
                  Arul Sendhil and
                  Amir Amirkhany},
  editor       = {Rakesh Patel and
                  Tom Andre and
                  Aurangzeb Khan},
  title        = {An output structure for a bi-modal 6.4-Gbps {GDDR5} and 2.4-Gbps {DDR3}
                  compatible memory interface},
  booktitle    = {2011 {IEEE} Custom Integrated Circuits Conference, {CICC} 2011, San
                  Jose, CA, USA, Sept. 19-21, 2011},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/CICC.2011.6055399},
  doi          = {10.1109/CICC.2011.6055399},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/MishraJLMSA11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}