BibTeX record conf/cicc/HuangRBCK02

download as .bib file

@inproceedings{DBLP:conf/cicc/HuangRBCK02,
  author       = {Xuejue Huang and
                  Phillip J. Restle and
                  Thomas J. Bucelot and
                  Yu Cao and
                  Tsu{-}Jae King},
  title        = {Loop-based interconnect modeling and optimization approach for multi-GHz
                  clock network design},
  booktitle    = {Proceedings of the {IEEE} 2002 Custom Integrated Circuits Conference,
                  {CICC} 2002, Orlando, FL, USA, May 12-15, 2002},
  pages        = {19--22},
  publisher    = {{IEEE}},
  year         = {2002},
  url          = {https://doi.org/10.1109/CICC.2002.1012758},
  doi          = {10.1109/CICC.2002.1012758},
  timestamp    = {Tue, 04 Oct 2022 22:39:17 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/HuangRBCK02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.