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BibTeX record conf/cicc/HuangRBCK02
@inproceedings{DBLP:conf/cicc/HuangRBCK02, author = {Xuejue Huang and Phillip J. Restle and Thomas J. Bucelot and Yu Cao and Tsu{-}Jae King}, title = {Loop-based interconnect modeling and optimization approach for multi-GHz clock network design}, booktitle = {Proceedings of the {IEEE} 2002 Custom Integrated Circuits Conference, {CICC} 2002, Orlando, FL, USA, May 12-15, 2002}, pages = {19--22}, publisher = {{IEEE}}, year = {2002}, url = {https://doi.org/10.1109/CICC.2002.1012758}, doi = {10.1109/CICC.2002.1012758}, timestamp = {Thu, 01 Aug 2024 07:59:29 +0200}, biburl = {https://dblp.org/rec/conf/cicc/HuangRBCK02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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