Parameterized VHDL Entities for the Simulation of Hybrid Circuits.

Michael Ryba Wolfram Seibold Utz G. Baitinger Ulrich Thelen Parameterized VHDL Entities for the Simulation of Hybrid Circuits. 551-567 1993 conf/chdl/1993 CHDL db/conf/chdl/chdl1993.html#RybaSBT93