A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs.

Himanshu Thapliyal Vishal Verma Hamid R. Arabnia A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs. 36-38 2006 conf/cdes/2006 CDES db/conf/cdes/cdes2006.html#ThapliyalVA06