Dynamic Switching Techniques of Accessing L1/L2 Cache on an SMT Processor.

Yoshiyasu Ogasawara Pulung Waskito Shinobu Miwa Hironori Nakajo Dynamic Switching Techniques of Accessing L1/L2 Cache on an SMT Processor. 171-177 2009 CDES conf/cdes/2009 db/conf/cdes/cdes2009.html#OgasawaraWMN09