An Approach for the Delay Simulation of D-Inverter in C-Ternary Logic Circuits.

Thanasin Bunnam Arthit Thongtak An Approach for the Delay Simulation of D-Inverter in C-Ternary Logic Circuits. 224-228 2008 CDES conf/cdes/2008 db/conf/cdes/cdes2008.html#BunnamT08