BibTeX record conf/ccseit/UmaD12b

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@inproceedings{DBLP:conf/ccseit/UmaD12b,
  author       = {R. Uma and
                  P. Dhavachelvan},
  editor       = {Natarajan Meghanathan and
                  Michal Wozniak},
  title        = {Synthesis optimization by redesigning {FPGA} architecture for area-speed
                  optimization},
  booktitle    = {The Second International Conference on Computational Science, Engineering
                  and Information Technology, {CCSEIT} '12, Coimbatore, India, October
                  26-28, 2012},
  pages        = {322--327},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2393216.2393271},
  doi          = {10.1145/2393216.2393271},
  timestamp    = {Thu, 07 Nov 2019 15:14:46 +0100},
  biburl       = {https://dblp.org/rec/conf/ccseit/UmaD12b.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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