BibTeX record conf/ccece/FarshidiRB17

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@inproceedings{DBLP:conf/ccece/FarshidiRB17,
  author       = {Ali Farshidi and
                  Logan Rakai and
                  Laleh Behjat},
  title        = {An efficient optimal clock network buffer sizing with slew consideration},
  booktitle    = {30th {IEEE} Canadian Conference on Electrical and Computer Engineering,
                  {CCECE} 2017, Windsor, ON, Canada, April 30 - May 3, 2017},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/CCECE.2017.7946666},
  doi          = {10.1109/CCECE.2017.7946666},
  timestamp    = {Sat, 30 Sep 2023 09:36:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ccece/FarshidiRB17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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