A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache).

Avesta Sasan Houman Homayoun Ahmed M. Eltawil Fadi J. Kurdahi A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache). 251-260 2009 CASES http://doi.acm.org/10.1145/1629395.1629431 conf/cases/2009 db/conf/cases/cases2009.html#SasanHEK09