BibTeX record conf/cases/LuGXSZWZ17

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@inproceedings{DBLP:conf/cases/LuGXSZWZ17,
  author       = {Yuntao Lu and
                  Lei Gong and
                  Chongchong Xu and
                  Fan Sun and
                  Yiwei Zhang and
                  Chao Wang and
                  Xuehai Zhou},
  title        = {A high-performance {FPGA} accelerator for sparse neural networks:
                  work-in-progress},
  booktitle    = {Proceedings of the 2017 International Conference on Compilers, Architectures
                  and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
                  of Korea, October 15-20, 2017},
  pages        = {12:1--12:2},
  publisher    = {{ACM}},
  year         = {2017},
  url          = {https://doi.org/10.1145/3125501.3125510},
  doi          = {10.1145/3125501.3125510},
  timestamp    = {Thu, 11 Mar 2021 17:04:51 +0100},
  biburl       = {https://dblp.org/rec/conf/cases/LuGXSZWZ17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}