BibTeX record conf/cases/HuangT19

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@inproceedings{DBLP:conf/cases/HuangT19,
  author       = {Chao{-}Hsuan Huang and
                  Ishan G. Thakkar},
  title        = {Mitigating Write Disturbance in Phase Change Memory Architectures},
  booktitle    = {2019 International Conference on Compliers, Architectures and Synthesis
                  for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
                  NY, USA, October 13-18, 2019},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://ieeexplore.ieee.org/document/8944382},
  timestamp    = {Mon, 10 Feb 2020 16:25:22 +0100},
  biburl       = {https://dblp.org/rec/conf/cases/HuangT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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